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- XC4062XLA-08BGG352I
Xilinx XC4062XLA-08BGG352I FPGA &CPLD Boards
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XC4062XLA-08BGG352I Tech Specifications
Xilinx XC4062XLA-08BGG352I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Surface Mount | YES | |
| Number of Terminals | 352Terminals | |
| Manufacturer Part Number | XC4062XLA-08BGG352I | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | XILINX INC | |
| Part Package Code | BGA | |
| Package Description | LBGA, | |
| Risk Rank | 5.79 | |
| Clock Frequency-Max | 263 MHz | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | LBGA | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY, LOW PROFILE | |
| Supply Voltage-Max | 3.6 V | |
| Supply Voltage-Nom | 3.3 V | |
| Reflow Temperature-Max (s) | 40 | |
| Supply Voltage-Min | 3 V | |
| JESD-609 Code | e1 | |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) | |
| Additional Feature | CAN ALSO USE 130000 GATES | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 260 | |
| Terminal Pitch | 1.27 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 352 | |
| JESD-30 Code | S-PBGA-B352 | |
| Qualification Status | Not Qualified | |
| Organization | 2304 CLBS, 40000 GATES | |
| Seated Height-Max | 1.7 mm | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Combinatorial Delay of a CLB-Max | 1 ns | |
| Number of CLBs | 2304CLBs | |
| Number of Equivalent Gates | 40000Equivalent Gates | |
| Length | 35 mm | |
| Width | 35 mm |
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