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74LV259PW,118 Tech Specifications

Nexperia  74LV259PW,118 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Logic Family LV
Latch Mode Addressable
Number of Channels per Chip 8Channels per Chips
Number of Elements per Chip 1
Number of Inputs per Chip 1
Number of Input Enables per Element 1
Number of Selection Inputs per Element 3Selection Inputs per Elements
Number of Outputs per Chip 8Outputs per Chips
Number of Output Enables per Element 0
Bus Hold No
Set/Reset Master Reset
Maximum Propagation Delay Time @ Maximum CL (ns) 20(Typ)@3.3V|36(Typ)@2V|105(Typ)@1.2V|26(Typ)@2.7V
Absolute Propagation Delay Time (ns) 61
Process Technology CMOS
Maximum Low Level Output Current (mA) 6
Maximum High Level Output Current (mA) -6
Minimum Operating Supply Voltage (V) 1
Typical Operating Supply Voltage (V) 3.3
Maximum Operating Supply Voltage (V) 3.6
Maximum Quiescent Current (uA) 160
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 125
Supplier Package TSSOP
Mounting Surface Mount
Package Height 0.95(Max)
Package Length 5.1(Max)
Package Width 4.5(Max)
PCB changed 16
ECCN (US) EAR99
Packaging Tape and Reel
Part Status Obsolete
Type D-Type
Pin Count 16
Polarity Non-Inverting
RoHS Status Supplier Unconfirmed
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74LV259PW,118 Documents

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