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DS17285SN-5 Tech Specifications
Maxim Integrated DS17285SN-5 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 10 Weeks | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) | |
| Number of Pins | 24Pins | |
| Weight | 1.098005g | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Tube | |
| Published | 2000 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 24Terminations | |
| ECCN Code | EAR99 | |
| Type | Clock/Calendar | |
| Terminal Finish | Matte Tin (Sn) | |
| HTS Code | 8542.39.00.01 | |
| Voltage - Supply | 4.5V~5.5V | |
| Terminal Position | DUAL | |
| Peak Reflow Temperature (Cel) | 260 | |
| Supply Voltage | 5V | |
| Terminal Pitch | 1.27mm | |
| Base Part Number | DS17285 | |
| Pin Count | 24 | |
| Operating Supply Voltage | 5V | |
| Power Supplies | 5V | |
| Interface | Parallel | |
| Memory Size | 2KB | |
| Operating Supply Current | 25mA | |
| Clock Frequency | 0.032MHz | |
| Logic Function | Clock | |
| External Data Bus Width | 8 | |
| Number of Timers | 1Timer | |
| Time Format | HH:MM:SS (12/24 hr) | |
| Date Format | YY-MM-DD-dd | |
| Current - Timekeeping (Max) | 3mA @ 4.5V~5.5V | |
| Time-Min | SECONDS | |
| Interrupt Capability | Y | |
| Voltage - Supply, Battery | 2.5V~3.7V | |
| Volatile | YES | |
| Features | Alarm, Daylight Savings, Leap Year, NVSRAM, Square Wave Output | |
| Length | 17.9mm | |
| Height Seated (Max) | 2.67mm | |
| Width | 7.5mm | |
| Radiation Hardening | No | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Lead Free |
DS17285SN-5 Documents
Download datasheets and manufacturer documentation for DS17285SN-5
- DatasheetsDS17x85, x87 DS17285SN-5 -Maxim-Integrated-datasheet-13723671.pdf DS17285SN-5 -Maxim-datasheet-118475.pdf
- Environmental InformationMaterial Declaration DS17285SN-5
- Application NotesState Machine Logic in Binary-Coded Decimal (BCD)-Formatted Real-Time Clocks Problems and Solutions for Adjusting to Changes in Daylight Saving Time Selecting a Backup Source for Real-Time Clocks Oscillator Design Considerations for Low-Current Applications
- Other Related DocumentsTips for Writing Bulletproof Real-Time Clock Control Code
- ConflictMineralStatementMaxim-Integrated-company-65.pdf
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