Intersil CD74HCT30E Logic Gates 1Function
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CD74HCT30E Tech Specifications
Intersil CD74HCT30E technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 6 Weeks | |
| Surface Mount | NO | |
| Number of Terminals | 14Terminals | |
| RoHS | Non-Compliant | |
| Package Description | DIP-14 | |
| Package Style | IN-LINE | |
| Load Capacitance (CL) | 50 pF | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Equivalence Code | DIP14,.3 | |
| Operating Temperature-Min | -55 °C | |
| Reflow Temperature-Max (s) | NOT SPECIFIED | |
| Operating Temperature-Max | 125 °C | |
| Rohs Code | Yes | |
| Manufacturer Part Number | CD74HCT30E | |
| Supply Voltage-Nom (Vsup) | 5 V | |
| Package Code | DIP | |
| Package Shape | RECTANGULAR | |
| Manufacturer | Texas | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | Texas INC | |
| Risk Rank | 1 | |
| Part Package Code | DIP | |
| Prop. | 42 ns | |
| JESD-609 Code | e4 | |
| ECCN Code | EAR99 | |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Gates | |
| Packing Method | TUBE | |
| Technology | CMOS | |
| Terminal Position | DUAL | |
| Terminal Form | THROUGH-HOLE | |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
| Number of Functions | 1Function | |
| Terminal Pitch | 2.54 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 14 | |
| JESD-30 Code | R-PDIP-T14 | |
| Qualification Status | Not Qualified | |
| Supply Voltage-Max (Vsup) | 5.5 V | |
| Power Supplies | 5 V | |
| Temperature Grade | MILITARY | |
| Supply Voltage-Min (Vsup) | 4.5 V | |
| Family | HCT | |
| Number of Inputs | 8Inputs | |
| Seated Height-Max | 5.08 mm | |
| Logic IC Type | NAND GATE | |
| Max I(ol) | 0.004 A | |
| Propagation Delay (tpd) | 42 ns | |
| Schmitt Trigger | NO | |
| Power Supply Current-Max (ICC) | 0.04 mA | |
| Width | 7.62 mm | |
| Length | 19.305 mm |
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