- All Products
- Integrated Circuits (ICs)
- Embedded - CPLDs (Complex Programmable Logic Devices)
- EP910DI-35
Intel EP910DI-35 CPLDs 24Macro Cells
In Stock Min. : 1
Mult. : 1
Not available to buy on line? Want the lower wholesale price? Please
sendRFQ, we will
respond immediately
EP910DI-35 Tech Specifications
Intel EP910DI-35 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| EU RoHS | Not Compliant | |
| ECCN (US) | EAR99 | |
| HTS | 8542.39.00.01 | |
| Automotive | No | |
| PPAP | No | |
| Family Name | Classic | |
| Number of Global Clocks | 2Global Clocks | |
| Product Terms | 8 | |
| Device System Gates | 450 | |
| Data Gate | No | |
| Maximum Number of User I/Os | 38User I/Os | |
| In-System Programmability | No | |
| Programmability | Yes | |
| Reprogrammability Support | Yes | |
| Maximum Internal Frequency (MHz) | 38.46 | |
| Maximum Clock to Output Delay (ns) | 21 | |
| Maximum Propagation Delay Time (ns) | 35 | |
| Individual Output Enable Control | No | |
| Minimum Operating Supply Voltage (V) | 4.5 | |
| Maximum Operating Supply Voltage (V) | 5.5 | |
| Typical Operating Supply Voltage (V) | 5 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Operating Temperature (°C) | 85 | |
| Supplier Temperature Grade | Industrial | |
| Tradename | Classic | |
| Mounting | Through Hole | |
| Package Height | 4.83(Max) | |
| Package Width | 13.97 | |
| Package Length | 52.07 | |
| PCB changed | 40 | |
| Standard Package Name | DIP | |
| Supplier Package | CDIP | |
| Lead Shape | Through Hole | |
| Part Status | Obsolete | |
| Pin Count | 40 | |
| Program Memory Type | EPROM | |
| Speed Grade | 35 | |
| Number of Macro Cells | 24Macro Cells |
Index :
0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ