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10M08SAE144C8G Tech Specifications
Intel 10M08SAE144C8G technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 11 Weeks | |
| Mounting Type | Surface Mount | |
| Package / Case | 144-LQFP Exposed Pad | |
| Surface Mount | YES | |
| Number of I/Os | 101I/Os | |
| Operating Temperature | 0°C~85°C TJ | |
| Packaging | Tray | |
| Series | MAX® 10 | |
| JESD-609 Code | e3 | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 144Terminations | |
| Terminal Finish | Matte Tin (Sn) - annealed | |
| HTS Code | 8542.39.00.01 | |
| Voltage - Supply | 2.85V~3.465V | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
| JESD-30 Code | S-PQFP-G144 | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Logic Elements/Cells | 8000Logic Elements/Cells | |
| Total RAM Bits | 387072 | |
| Number of LABs/CLBs | 500LABs/CLBs | |
| RoHS Status | RoHS Compliant |
10M08SAE144C8G Documents
Download datasheets and manufacturer documentation for 10M08SAE144C8G
- PCN PackagingMult Dev Label CHG 24/Jan/2020 Mult Dev Dessicant Chg 19/Jul/2019 All Dev Pkg Chg 1/Aug/2018 Mult Dev Label Chgs 24/Feb/2020
- DatasheetsMAX 10 FPGA Device Datasheet MAX 10 User Guide MAX 10 FPGA Overview
- ConflictMineralStatementIntel-company-52.pdf
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