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- EPM7256BFC256-10
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EPM7256BFC256-10 Tech Specifications
ALTERA EPM7256BFC256-10 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Mounting Type | Surface Mount | |
| Package / Case | 256-BGA | |
| Surface Mount | YES | |
| Supplier Device Package | 256-FBGA (17x17) | |
| Number of Terminals | 256Terminals | |
| Number of I/Os | 164I/Os | |
| Number of Macrocells | 256Macrocells | |
| Package Description | BGA, BGA256,16X16,40 | |
| Package Style | GRID ARRAY | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Equivalence Code | BGA256,16X16,40 | |
| Supply Voltage-Nom | 2.5 V | |
| Reflow Temperature-Max (s) | 30 | |
| Supply Voltage-Min | 2.375 V | |
| Operating Temperature-Max | 70 °C | |
| Rohs Code | No | |
| Manufacturer Part Number | EPM7256BFC256-10 | |
| Clock Frequency-Max | 188.7 MHz | |
| Package Code | BGA | |
| Package Shape | SQUARE | |
| Manufacturer | Intel Corporation | |
| Part Life Cycle Code | Obsolete | |
| Number of I/O Lines | 164I/O Lines | |
| Ihs Manufacturer | INTEL CORP | |
| Supply Voltage-Max | 2.625 V | |
| Risk Rank | 5.1 | |
| Operating Temperature | 0°C ~ 70°C (TA) | |
| Series | MAX® 7000B | |
| Packaging | Tray | |
| JESD-609 Code | e0 | |
| Part Status | Obsolete | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin/Lead (Sn/Pb) | |
| Additional Feature | YES | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Programmable Logic Devices | |
| Technology | CMOS | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 220 | |
| Terminal Pitch | 1 mm | |
| Reach Compliance Code | compliant | |
| Base Part Number | EPM7256 | |
| JESD-30 Code | S-PBGA-B256 | |
| Qualification Status | Not Qualified | |
| Power Supplies | 1.8/3.3,2.5 V | |
| Temperature Grade | COMMERCIAL | |
| Programmable Type | In System Programmable | |
| Propagation Delay | 5 ns | |
| Organization | 0 DEDICATED INPUTS, 164 I/O | |
| Seated Height-Max | 3.5 mm | |
| Programmable Logic Type | EE PLD | |
| Number of Gates | 5000Gates | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 256Macro Cells | |
| JTAG BST | YES | |
| Voltage Supply - Internal | 2.375 V ~ 2.625 V | |
| Delay Time tpd(1) Max | 10.0ns | |
| Number of Logic Elements/Blocks | 16Logic Elements/Blocks | |
| In-System Programmable | YES | |
| Width | 17 mm | |
| Length | 17 mm |
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