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- EPM5032DC-15
Altera EPM5032DC-15 CPLDs 5V 28Terminations
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EPM5032DC-15 Tech Specifications
ALTERA EPM5032DC-15 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Surface Mount | NO | |
| Number of I/Os | 16I/Os | |
| Operating Temperature (Max.) | 70°C | |
| JESD-609 Code | e0 | |
| Pbfree Code | no | |
| Number of Terminations | 28Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin/Lead (Sn/Pb) | |
| Additional Feature | MACROCELLS INTERCONNECTED BY PIA; 1 LAB; 32 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | DUAL | |
| Terminal Form | THROUGH-HOLE | |
| Peak Reflow Temperature (Cel) | 220 | |
| Supply Voltage | 5V | |
| Terminal Pitch | 2.54mm | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Pin Count | 28 | |
| JESD-30 Code | R-GDIP-T28 | |
| Number of Outputs | 16Outputs | |
| Qualification Status | Not Qualified | |
| Supply Voltage-Max (Vsup) | 5.25V | |
| Power Supplies | 5V | |
| Temperature Grade | COMMERCIAL | |
| Supply Voltage-Min (Vsup) | 4.75V | |
| Clock Frequency | 76.9MHz | |
| Propagation Delay | 15 ns | |
| Architecture | PAL-TYPE | |
| Number of Inputs | 24Inputs | |
| Organization | 7 DEDICATED INPUTS, 16 I/O | |
| Programmable Logic Type | UV PLD | |
| Output Function | MACROCELL | |
| Number of Dedicated Inputs | 7Dedicated Inputs | |
| Number of Product Terms | 320Product Terms | |
| RoHS Status | Non-RoHS Compliant |
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