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DFDF2812ZHHAR Tech Specifications
Texas Instruments DFDF2812ZHHAR technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 6 Weeks | |
| Surface Mount | YES | |
| Packaging | Tape & Reel (TR) | |
| JESD-609 Code | e1 | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 179Terminations | |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
| Max Operating Temperature | 125°C | |
| Min Operating Temperature | -40°C | |
| Additional Feature | 1.8V NOMINAL AVAILBALE @135MHZ | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 260 | |
| Supply Voltage | 1.9V | |
| Terminal Pitch | 0.8mm | |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
| Base Part Number | DFDF2812 | |
| JESD-30 Code | S-PBGA-B179 | |
| Supply Voltage-Max (Vsup) | 2V | |
| Temperature Grade | INDUSTRIAL | |
| Supply Voltage-Min (Vsup) | 1.81V | |
| uPs/uCs/Peripheral ICs Type | DIGITAL SIGNAL PROCESSOR, OTHER | |
| Accessory Type | Power Supply | |
| Clock Frequency | 35MHz | |
| Bit Size | 32 | |
| Address Bus Width | 19 | |
| On Chip Program ROM Width | 16 | |
| Boundary Scan | YES | |
| Low Power Mode | YES | |
| External Data Bus Width | 16 | |
| Format | FIXED POINT | |
| Integrated Cache | NO | |
| Number of UART Channels | 2UART Channels | |
| Number of Timers | 8Timers | |
| ROM Programmability | OTPROM | |
| Number of External Interrupts | 3External Interrupts | |
| Barrel Shifter | NO | |
| Internal Bus Architecture | MULTIPLE | |
| On Chip Data RAM Width | 16 | |
| Number of GPIO | 56GPIOs | |
| Height Seated (Max) | 1.4mm | |
| RoHS Status | ROHS3 Compliant | 
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